Known examples of data holding devices for use in a sequential circuit such as a latch circuit include a circuit in which two inverter circuits are connected in series in a loop. Typically, however, such a data holding device can hold data only in a volatile manner, so data is lost once power is shut off. That is, the data before a shutdown cannot be restored even when power is turned on again.
Thus, when sequence processing using a latch circuit having such a data holding device is suspended for some reason, power supply needs to be continued to hold data, and thus electric power is accordingly consumed. Furthermore, if sequence processing is suspended due to, for example, an accidental power failure, the processing needs to be executed again from the beginning, which results in a great loss of time.
To solve these problems, Patent Document 1 filed by the applicant of the present application discloses and proposes a data holding device that holds data in a non-volatile manner by using a ferroelectric capacitor.
FIG. 23 is a circuit diagram showing a conventional example of a data holding device.
The data holding device shown in the figure is formed by connecting a ferroelectric device CL to a signal line (that is indicated by the thick line in the figure and in which held data appears as a voltage signal) in a memory device having a loop structure (the part surrounded by the broken line in the figure) formed with inverters INVx and INVy.
At a shutdown, data is written in the ferroelectric device CL by setting the state of the remanent polarization of the ferroelectric device CL by using a voltage level on the signal line. By this writing operation, data can be held in a non-volatile manner after a shutdown.
On the other hand, in an operation of reading out data written in the ferroelectric device CL, after power is turned on, with a node N in a floating state, a voltage pulse is applied to an end of the ferroelectric device CL from a plate line PL to generate, at the node N, a voltage signal corresponding to the state of the remanent polarization of the ferroelectric device CL. With respect to the voltage signal generated at the node N, data determination (0/1 determination) is performed based on a threshold value of the inverter INVx.    Patent Document 1: Japanese Patent No. 3737472